This invention relates to a bipolar transistor and also to a method of fabricating the same. More particularly, the invention relates to a bipolar transistor and its fabrication method wherein single crystal silicon germanium is used as an intrinsic base layer.
A conventional bipolar transistor of the type wherein single crystal silicon germanium is used as an intrinsic base layer is described, for example, in Technical Report of the Institute of Electronics, Information and Communication Engineers SDM91-124, pp. 19 to 24, 1991. The structure in section of the prior art bipolar transistor is shown in FIG. 2.
With reference to FIG. 2, a method of fabricating the prior art bipolar transistor is briefly illustrated. In FIG. 2, reference numeral 21 indicates a silicon substrate. After epitaxial growth of a low concentration n-type silicon layer 23, serving as a collector layer, on a high concentration n-type buried layer 22 formed in the silicon substrate 21, a device isolation layer 24 is formed by selective oxidation.
Subsequently, a base-collector isolation layer 25, an extrinsic base electrode 26 made of polysilicon, and an emitter-base isolation layer 27 are formed on the low concentration n-type silicon layer 23. The emitter-base isolation layer 27 and the extrinsic base electrode 26 are, respectively, etched to form an opening.
After coverage of the side walls of the extrinsic base electrode 26 with an insulating layer 27a, single crystal silicon germanium is epitaxially grown to form an intrinsic base layer 28. Simultaneously with the epitaxial growth of the single crystal silicon germanium, an extrinsic base 29 made of polysilicon is deposited from the bottom surface of the overhang of the base electrode 26, so that when the growth is continued, the intrinsic base layer 28 and the extrinsic base electrode 26 are connected through an extrinsic base 29.
To prevent the conduction between the extrinsic base 29 and an emitter, an emitter-base isolation layer 30 is formed. An n-type polysilicon 31 in which arsenic is doped at a high concentration is deposited in the opening, followed by annealing to cause the arsenic to be diffused into the intrinsic base layer 28, thereby forming an emitter layer 32. After formation of an insulating layer 33, an electrode 35 is formed. It will be noted that reference numeral 34 indicates a high concentration n-type collector electrode layer.
The profiles of germanium and the impurities in the known bipolar transistor wherein single crystal silicon germanium is used as an intrinsic base layer are, respectively, shown in FIGS. 3A and 3B. FIG. 3A is a compositional profile of germanium, and FIG. 3B is a concentration profile of the respective impurities. In the figures, J.sub.EB and J.sub.BC shown by the broken lines, respectively, indicate an interface of emitter-base junction and an interface of base-collector junction.
As will be appreciated from FIG. 3A, because doping is carried out during the course of the growth of the single crystal silicon germanium, the intrinsic base layer made of single crystal silicon germanium is formed directly on the collector region made of single crystal silicon. The energy band structure of the bipolar transistor having this profile is shown in FIG. 4. The energy barrier ascribed to the difference in band gap between the single crystal silicon and the single crystal silicon germanium is created at the base-collector interface, J.sub.BC, with the attendant problem that the transit time of the carriers charged from the emitter becomes long.
Japanese Laid-open Patent Application No. 3-125476 proposes a heterobipolar transistor structure wherein both a base layer and a low impurity concentration collector layer are formed of a mixed crystal of silicon germanium in order to prevent an energy barrier against a collector current to be developed between the base layer and the low impurity concentration collector layer. If this is applied to the above-stated type of bipolar transistor structure where the base electrode is self-alignedly established, e.g. if a single crystal silicon germanium layer is formed between the intrinsic base layer 28 and the low concentration collector layer 23 in a self-aligned manner, as shown in FIG. 2, polysilicon germanium of low concentration is undesirably deposited beneath the extrinsic base electrode 26 made of polysilicon. In this way, an extrinsic base having a high resistance is formed between the extrinsic base electrode 26 and the intrinsic base layer 28. This, in turn, presents the problem that the base resistance increases and, thus, the circuit operation becomes slow.
Moreover, an n-type impurity from the high concentration polysilicon 31 serving as an emitter electrode is diffused into the single crystal silicon germanium layer 28 which has been formed while doping, so that the concentration of the impurity at the emitter-base junction becomes high as is particularly shown in FIG. 3B. This leads to the problem that a tunnel effect takes place at the emitter-base interface and the leakage current in the base region increases.
Japanese Laid-open Patent Application No. 7-147287 discloses a bipolar transistor wherein the formation of a parasitic energy barrier in a base-collector junction region is prevented and thus, the frequency cutoff is suppressed from lowering. To this end, the bipolar transistor is so arranged that a base layer and a collector layer are, respectively, made of single crystal silicon containing germanium. Ge is between the diffused layer of the extrinsic base region and the collector becomes greater than with the case where the base electrode is self-alignedly taken out via the polysilicon layer directly connected with the intrinsic base layer as shown in FIG. 2.